系统整合
搭建vivado整合工程:
系统总体设计图
调试原因:
- 器件型号需要统一,包括HLS的IP核元器件型号和vivado工程器件型号
本项目为702-1L
- 系统总体设计需要注意时钟速率问题,有可能因为时钟速率导致传输时间和传输的同步性问题,造成不同步问题的出现。
- 生成bit流文件时需注意自定义IP的位置需要确认清楚,定位到自定义IP的文件夹目录否则编译无法通过。
SDK调试问题:
- 需要特别注意的是不同地址的分配问题,嵌入式需特别注意内存的分配问题,所有需要内存空间的变量都需要手动设置地址,内存地址大小的分配问题也需要特别注意不,需要提前计算好地址大小,以防止内存被占用,导致其他问题。
- 内存设置的顺序需严格遵守代码规范
- 代码书写需规范 需规范 规范
- 变量命名需规范
VDMA设置问题:
读写通道的VDMA设置
void VDMA1_setting(unsigned int width, unsigned int height,
unsigned int s2mm_addr, unsigned int mm2s_addr) {
//S2MM
Xil_Out32(VDMA1 + 0x30, 0x3); //reset S2MM VDMA Control Register
//sleep(100);
//Xil_Out32(VDMA1 + 0x30, 0x8); //genlock
Xil_Out32(VDMA1 + 0x30, 0x3); //S2MM VDMA Control Register
Xil_Out32(VDMA1 + 0xAC, s2mm_addr); //S2MM Start Addresses
Xil_Out32(VDMA1 + 0xAC + 4, s2mm_addr);
Xil_Out32(VDMA1 + 0xAC + 8, s2mm_addr);
Xil_Out32(VDMA1 + 0xA4, width * 4); //S2MM Horizontal Size
Xil_Out32(VDMA1 + 0xA8, width * 4); //S2MM Frame Delay and Stride
Xil_Out32(VDMA1 + 0x30, 0x3); //S2MM VDMA Control Register
Xil_Out32(VDMA1 + 0xA0, height); //S2MM Vertical Size start an S2M
//Xil_DCacheFlush();
//MM2S
//Xil_Out32(VDMA1 + 0x00, 0x00034083); // enable circular mode
Xil_Out32(VDMA1 + 0x00, 0x00000003); // enable circular mode
Xil_Out32(VDMA1 + 0x5c, mm2s_addr); // start address
Xil_Out32(VDMA1 + 0x60, mm2s_addr); // start address
Xil_Out32(VDMA1 + 0x64, mm2s_addr); // start address
Xil_Out32(VDMA1 + 0x58, (width * 4)); // h offset
Xil_Out32(VDMA1 + 0x54, (width * 4)); // h size
Xil_Out32(VDMA1 + 0x50, height); // v size
//Xil_DCacheFlush();
}
读通道VDMA设置
void VDMA2_setting(unsigned int width, unsigned int height,
unsigned int mm2s_addr) {
Xil_Out32(VDMA2 + 0x00, 0x00000003); // enable circular mode
//Xil_Out32(VDMA2 + 0x00, 0x00034083); // enable circular mode
//0x00034083
Xil_Out32(VDMA2 + 0x5c, mm2s_addr); // start address
Xil_Out32(VDMA2 + 0x60, mm2s_addr); // start address
Xil_Out32(VDMA2 + 0x64, mm2s_addr); // start address
Xil_Out32(VDMA2 + 0x58, (width * 4)); // h offset
Xil_Out32(VDMA2 + 0x54, (width * 4)); // h size
Xil_Out32(VDMA2 + 0x50, height); // v size
//Xil_Out32(VDMA1 + 0x50, height); // v size
//
//Xil_DCacheFlush();
}
初始化整体设置
void VDMA_Setup() {
//const int cols = 512;
//const int rows = 512;
XHls_counter_color1_SetRows(&counter, 1990);
XHls_counter_color1_SetCols(&counter, 2616);
XHls_counter_color1_EnableAutoRestart(&counter);
XHls_counter_color1_InterruptGlobalDisable(&counter);
VDMA1_setting(ROW, COL, VIDEO_BASEADDR4, VIDEO_BASEADDR0_COPY);
VDMA2_setting(ROW, COL, VIDEO_BASEADDR1_COPY);
}
需注意:
XHls_counter_color1_SetRows(&counter, 1990);/行列颠倒问题行为列数列为行数
XHls_counter_color1_SetCols(&counter, 2616);
XHls_counter_color1_EnableAutoRestart(&counter);//Disable 和Enable的不同 单一图像为Disable 连续图像为Enable