ProfileConfig
函数原型：
rlReturnVal_t rlSetProfileConfig(
rlUInt8_t deviceMap,
rlUInt16_t cnt,
rlProfileCfg_t * data
)
函数功能：
这个函数用于设置mmWave Front end的chirp profile，一个profile就像一个模板，其中包含有关FMCW信号的粗略信息，如起始频率、chirp斜率、chirp持续时间、发生功能等。API允许通过将profile数组与profile计数一起传递来设置多个profiles。
函数参数：
第一个参数deviceMap是输入参数，意思是：Bitmap of devices to send the message，取值可以有：
RL_DEVICE_MAP_INTERNAL_BSS
RL_DEVICE_MAP_INTERNAL_DSS_MSS
RL_DEVICE_MAP_INTERNAL_HOST
第二个参数cnt是输入参数，意思是：Profiles的数量
第三个参数data是输入参数，意思是：Profile配置的数据的数组，它是一个rlProfileCfg_t结构体，如下：
typedef struct rlProfileCfg
{
/**
* @brief Profile index (0-3)
*/
rlUInt16_t profileId;
#ifndef MMWL_BIG_ENDIAN
/**
* @brief Bit Description \n
b0 FORCE_VCO_SEL \n
0 - Use internal VCO selection \n
1 - Forced external VCO selection \n
b1 VCO_SEL \n
0 - VCO1 (77G:76 - 78 GHz or 60G:57 - 60.75 GHz) \n
1 - VCO2 (77G:77 - 81 GHz or 60G:60.25 - 64 GHz) \n
@note : There is an overlap region of 77-78 GHz and 60.25-60.75GHz in which \n
any of the VCOs can be used, for other regions use only the VCO which can work \n
in that region. For e.g. for 76-77 GHz use only VCO1 and for 78-81GHz use only \n
VCO2, for 77-78 GHz, any VCO can be used, similarly in 60G device \n
60.25-60.75GHz overlap region can be used by any VCO. Also note that users \n
should not inter-mix chirps from different VCOs within the same frame.\n
b7:2 RESERVED \n
*/
rlUInt8_t pfVcoSelect;
/**
* @brief Bit Description \n
b0 RETAIN_TXCAL_LUT (Not supported in IWR6843 ES1.0) \n
0 - Update TX calibration LUT \n
1 - Do not update TX calibration LUT \n
b1 RETAIN_RXCAL_LUT (Not supported in IWR6843 ES1.0) \n
0 - Update RX calibration LUT and update RX IQMM correction \n
1 - Do not update RX calibration LUT \n
b7:2 RESERVED \n
If PF_TX_OUTPUT_POWER_BACKOFF is changed then set RETAIN_TXCAL_LUT to 0, \n
else set it to 1 and if PF_RX_GAIN is changed, then set RETAIN_RXCAL_LUT to 0 \n
else set them to 1.
*/
rlUInt8_t pfCalLutUpdate;
#else
/**
* @brief Bit Description \n
b0 RETAIN_TXCAL_LUT (Not supported in IWR6843 ES1.0) \n
0 - Update TX calibration LUT \n
1 - Do not update TX calibration LUT \n
b1 RETAIN_RXCAL_LUT (Not supported in IWR6843 ES1.0) \n
0 - Update RX calibration LUT \n
1 - Do not update TX calibration LUT \n
b7:2 RESERVED \n
If PF_TX_OUTPUT_POWER_BACKOFF is changed then set RETAIN_TXCAL_LUT to 0, \n
else set it to 1 and if PF_RX_GAIN is changed, then set RETAIN_RXCAL_LUT to 0 \n
else set them to 1.
*/
rlUInt8_t pfCalLutUpdate;
/**
* @brief Bit Description \n
b0 FORCE_VCO_SEL \n
0 - Use internal VCO selection \n
1 - Forced external VCO selection \n
b1 VCO_SEL \n
0 - VCO1 (77G:76 - 78 GHz or 60G:57 - 60.75 GHz) \n
1 - VCO2 (77G:77 - 81 GHz or 60G:60.25 - 64 GHz) \n
@note : There is an overlap region of 77-78 GHz and 60.25-60.75GHz in which \n
any of the VCOs can be used, for other regions use only the VCO which can work \n
in that region. For e.g. for 76-77 GHz use only VCO1 and for 78-81GHz use only \n
VCO2, for 77-78 GHz, any VCO can be used, similarly in 60G device \n
60.25-60.75GHz overlap region can be used by any VCO. Also note that users \n
should not inter-mix chirps from different VCOs within the same frame.\n
b7:2 RESERVED \n
*/
rlUInt8_t pfVcoSelect;
#endif
/**
* @brief Start frequency for each profile \n
For 77GHz devices (76 GHz - 81 GHz): \n
1 LSB = 3.6e9 / 2^26 Hz = 53.644 Hz \n
Valid range: 0x5471C71B to 0x5A000000 \n
For 60GHz devices (57 GHz - 64 GHz): \n
1 LSB = 2.7e9 / 2^26 Hz = 40.233 Hz \n
Valid range: 0x5471C71C to 0x5ED097B4 \n
*/
rlUInt32_t startFreqConst;
/**
* @brief Idle time\n
1 LSB = 10 ns \n
Valid range: 0 to 524287 \n
*/
rlUInt32_t idleTimeConst;
/**
* @brief Time of starting of ADC capture relative to the knee of the ramp\n
1 LSB = 10 ns \n
Valid range: 0 to 4095 \n
*/
rlUInt32_t adcStartTimeConst;
/**
* @brief End of ramp time relative to the knee of the ramp\n
1 LSB = 10 ns\n
Valid range: 0 to 500000 \n
Ensure that the total frequency sweep is either within these ranges: \n
77G : 76 - 78 GHz or 77 - 81 GHz \n
60G : 57 - 60.75 GHz or 60.25 - 64 GHz \n
*/
rlUInt32_t rampEndTime;
/**
* @brief Concatenated code for output power backoff for TX0, TX1, TX2\n
Bit Description \n
b7:0 TX0 output power back off \n
b15:8 TX1 output power back off \n
b23:16 TX2 output power back off \n
b31:24 Reserved \n
This field defiens how much the transmit power should be reduced from the maximum \n
1 LSB = 1 dB \n
If TX power boot time calibration is disabled then only 0dB back off is \n
supported. In IWR6843 ES1.0, only 0dB backoff is supported. \n
@note : For best inter-TX channel matching performance, same chirp profile and \n
same TX backoff value should be used for all the TXs that are used in \n
beam-forming
*/
rlUInt32_t txOutPowerBackoffCode;
/**
* @brief Concatenated phase shift for TX0/1/2,\n
Bit Description \n
b7:0 TX0 phase shift value \n
b15:8 TX1 phase shift value \n
b23:16 TX2 phase shift value \n
1 LSB = 360/2^6 = 5.625 degrees \n
b31:24 Reserved \n
This field defines the phase shift to be introduced on each transmitter output. \n
In IWR6843 ES1.0, only 0 degree phase is supported. \n
*/
rlUInt32_t txPhaseShifter;
/**
* @brief Ramp slope frequency, \n
For 77GHz devices (76GHz to 81GHz): \n
1 LSB = (3.6e6 * 900) / 2^26 = 48.279 kHz/uS \n
Valid range: -2072 to 2072 (Max 100MHz/uS) \n
For 60GHz devices (57GHz to 64GHz): \n
1 LSB = (2.7e6 * 900) / 2^26 = 36.21 kHz/uS for 60GHz devices \n
Valid range: -6905 to 6905 (Max 250 MHz/uS) \n
*/
rlInt16_t freqSlopeConst;
/**
* @brief Time of start of transmitter relative to the knee of the ramp \n
1 LSB = 10ns \n
Valid range: -4096 to 4095 \n
*/
rlInt16_t txStartTime;
/**
* @brief Number of ADC samples to capture in a chirp for each RX \n
Valid range: 2 to MAX_NUM_SAMPLES\n
Where MAX_NUM_SAMPLES is such that all the enabled RX channels' data fits \n
into 16 kB memory memory in AWR1243/xWR1443 or 32 kB memory in xWR1642/ \n
xWR6843/xWR1843, with each sample consuming 2 bytes for real ADC output \n
case and 4 bytes for complex 1x and complex 2x ADC output cases \n
number of RX chains ADC format Maxinum Number of samples \n
4 complex 1024 \n
4 Real 2048 \n
2 Complex 2048 \n
2 Real 4096 \n
*/
rlUInt16_t numAdcSamples;
/**
* @brief ADC Sampling rate for each profile is encoded in \n
2 bytes (16 bit unsigned number)\n
1 LSB = 1 ksps \n
Valid range 2000 to 37500 \n
*/
rlUInt16_t digOutSampleRate;
#ifndef MMWL_BIG_ENDIAN
/**
* @brief Code for HPF1 corner frequency\n
0x00 175 kHz \n
0x01 235 kHz \n
0x02 350 kHz \n
0x03 700 kHz \n
*/
rlUInt8_t hpfCornerFreq1;
/**
* @brief Code for HPF2 corner frequency\n
0x00 350 kHz \n
0x01 700 kHz \n
0x02 1.4 MHz \n
0x03 2.8 MHz \n
*/
rlUInt8_t hpfCornerFreq2;
#else
/**
* @brief Code for HPF2 corner frequency\n
0x00 350 kHz \n
0x01 700 kHz \n
0x02 1.4 MHz \n
0x03 2.8 MHz \n
*/
rlUInt8_t hpfCornerFreq2;
/**
* @brief Code for HPF1 corner frequency\n
0x00 175 kHz \n
0x01 235 kHz \n
0x02 350 kHz \n
0x03 700 kHz \n
*/
rlUInt8_t hpfCornerFreq1;
#endif
/**
* @brief Number of transmitters to turn on during TX power \n
calibration. During actual operation, if more than \n
1 TXs are enabled during the chirp, then enabling \n
the same TXs during calibration will have better TX \n
output power accuracy \n
b2:0 TX enabled during TX0 calibration \n
b0 - TX0, b1 - TX1, b2 - TX2 \n
b5:3 TX enabled during TX1 calibration \n
b3 - TX0, b4 - TX1, b5 - TX2 \n
b8:6 TX enabled during TX2 calibration \n
b6 - TX0, b7 - TX1, b8 - TX2 \n
b14:9 RESERVED \n
b15 Enable multi TX enable during TX power calibration. \n
Note : If this bit is not set, only 1 TX is enabled \n
during the TX power calibration. For e.g. during TX0 \n
calibration, only TX0 will be enabled; during TX1 \n
calibration, only TX1 will be enabled and so on. \n
NOTE: This field is not applcicable for IWR6843 ES 1.0
*/
rlUInt16_t txCalibEnCfg;
/**
* @brief
b5:0 Code for Rx VGA gain\n
1 LSB = 1 dB\n
Valid values: all even values from 24 to 52 \n
b7:6 Code for RF gain target (Not applicable for IWR6843 ES1.0, \n
RF gain is fixed to 34dB) \n
00 - 30 dB \n
01 - 34 dB \n
10 - RESERVED \n
11 - 26 dB \n
b15:8 RESERVED \n
In IWR6843 ES1.0 device, Rx Gain is not accurate and not calibrated. \n
The RF gain is 34dB and total Rx gain can be varied from 28dB to 56dB \n
*/
rlUInt16_t rxGain;
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved;
} rlProfileCfg_t;
函数返回值：
函数执行成功后返回值为0，函数执行失败后返回值为错误代码
注意
-
最多可以设置多达4个profiles。每个profile包含粗略信息。可以使用chirp配置API来添加精细的抖动
-
可以动态地调用这个API来更改profile地参数。少数的参数不能被修改，为：
numAdcSamples digOutSampleRate Programmable filter coefficients in xWR1642/xWR1843 -
有关最小的chirp持续时间的详细信息，可以参阅：链接
-
最大的TX输出功率仅支持20dB
-
函数chirp的profiles中使用的RF band应在AWR_CAL_MON_FREQUENCY_TX_POWER_LIMITS_SB API中设置的限制范围内
-
这个API在RadarSS子系统中大约要执行700us
-
移相器(PS)的设置应用于斜坡的拐点处
-
函数chirp profiles中使用的RF的中频编码+200MHz应在本API规定的最大限制范围内
ChirpConfig
函数原型：
rlReturnVal_t rlSetChirpConfig(
rlUInt8_t deviceMap,
rlUInt16_t cnt,
rlChirpCfg_t * data
)
函数功能：
此函数用于在chirp profile的顶部设置chirp到chirp的变化，用于首先应该使用rlSetProfileConfig定义一个profile。然后，这个函数通过将chirp与rlSetProfileConfig API中定义的特定的profile关联起来配置chirp。此外，用户能使用此API定义profile中的参数的精细抖动。此配置使用的抖动只是rlSetProfileConfig中编程参数的附加值。此API允许配置1个或512个chirp。它还允许配置每个chirp使用哪些发射通道
函数参数：
第一个参数deviceMap是输入参数，意思是：Bitmap of devices to send the message，取值可以有：
RL_DEVICE_MAP_INTERNAL_BSS
RL_DEVICE_MAP_INTERNAL_DSS_MSS
RL_DEVICE_MAP_INTERNAL_HOST
第二个参数cnt是输入参数，意思是：配置的数量
第三个参数data是输入参数，意思是：chirp配置的数据的数组，它是一个rlchirpCfg_t结构体，如下：
typedef struct rlChirpCfg
{
/**
* @brief Chirp start index (0-511)
*/
rlUInt16_t chirpStartIdx;
/**
* @brief Chirp end index (0-511)
*/
rlUInt16_t chirpEndIdx;
/**
* @brief Associated profile id (0-3)
*/
rlUInt16_t profileId;
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved;
/**
* @brief Ramp start frequency, \n
For 77GHz devices(76GHz to 81GHz): \n
1 LSB = 3.6e9/2^26 = 53.644 Hz \n
valid range = 0-8388607 \n
For 60GHz devices(57GHz to 64GHz): \n
1 LSB = 2.7e9/2^26 = 40.233 Hz \n
valid range = 0-8388607 \n
*/
rlUInt32_t startFreqVar;
/**
* @brief Ramp slope\n
For 77GHz devices(76GHz to 81GHz): \n
1 LSB = 3.6e6 * 900/2^26 = 48.279 KHz/us \n
valid range = 0-63 \n
For 60GHz devices(57GHz to 64GHz): \n
1 LSB = 2.7e6 * 900/2^26 = 36.21 KHz/us \n
valid range = 0-63 \n
*/
rlUInt16_t freqSlopeVar;
/**
* @brief Idle time for each chirp\n
1 LSB = 10ns\n
valid range = 0-4096 \n
*/
rlUInt16_t idleTimeVar;
/**
* @brief Adc start time for each chirp \n
1 LSB = 10ns \n
valid range = 0-4096 \n
*/
rlUInt16_t adcStartTimeVar;
/**
* @brief Tx enable selection bit mask \n
b0 Enable TX0 \n
0 Tx0 Disable \n
1 Tx0 Enable \n
b1 Enable TX1 \n
0 Tx1 Disable \n
1 Tx1 Enable \n
b2 Enable TX2 \n
0 Tx2 Disable \n
1 Tx2 Enable \n
Note: Maximum of only 2 TX can be turned in a chirp \n
*/
rlUInt16_t txEnable;
}rlChirpCfg_t;
函数返回值：
函数执行成功后返回值为0，函数执行失败后返回值为错误代码
注意
可以设置多达512个独特的chirp，能被存储在毫米波前端的专用存储器中。因此，用户不需要再运行时对chirp进行编程。也可以使用rlSetFrameConfig再一个帧中对这些chirp进行排序，以产生更大的FMCW信号。
AdvFrameConfig
函数原型：
rlReturnVal_t rlSetAdvFrameConfig(
rlUInt8_t deviceMap,
rlAdvFrameCfg_t * data
)
函数功能：
这个函数允许在mmWave前端配置高级帧。高级帧是一系列的chirp以及这个序列如何随着时间的推移而重复。用户首先需要定义一个profile和一系列的chirps(与profile相关)。然后，该函数定义如何对这些chirp进行排列。多个chirp被循环产生一个脉冲。可以将多个burst分组以创建sub-frame。多个sub-frame(最多4个)可以分组以创建高级帧。该函数可以定义高级帧的属性，如子帧中的burst的数量、burst中的chirps和loops的数、要发送的sub-frame序列、要发送的frames的数量，帧的周期性和触发方法。这个API在内部要调用两个API，一个调用RadarSS及进行传感器配置，另一个调用MasterSS进行数据路径的配置。
函数参数：
第一个参数deviceMap是输入参数，意思是：Bitmap of devices to send the message，取值可以有：
RL_DEVICE_MAP_INTERNAL_BSS
RL_DEVICE_MAP_INTERNAL_DSS_MSS
RL_DEVICE_MAP_INTERNAL_HOST
第二个参数data是输入参数，意思是：高级帧配置数据的容器，它是一个rlAdvFrameCfg_t结构体，如下：
typedef struct rlAdvFrameCfg
{
/**
* @brief Advance Frame sequence and Subframe configuration
*/
rlAdvFrameSeqCfg_t frameSeq;
/**
* @brief Advance Frame data configuration. Applicable with AWR1243 device only
*/
rlAdvFrameDataCfg_t frameData;
}rlAdvFrameCfg_t;
rlAdvFrameSeqCfg_t 结构体如下：
typedef struct rlAdvFrameSeqCfg
{
#ifndef MMWL_BIG_ENDIAN
/**
* @brief Number of sub frames enabled in this frame Valid range: 1 to 4
*/
rlUInt8_t numOfSubFrames;
/**
* @brief Force profile. \n
0x0 The profile index set in rlSetChirpConfig API governs which profile is \n
used when that chirp is transmitted \n
0x1 The profile index indicated in rlSetChirpConfig API is ignored and all \n
the chirps in each sub frame use a single profile as indicated by that sub \n
frame's profile forceProfileIdx. \n
*/
rlUInt8_t forceProfile;
/**
* @brief Bit Definition \n
b0 LOOPBACK_CFG_EN \n
0 - Disable \n
1 - Enable \n
b2:1 SUB_FRAME_ID for which the loopback configuration applies \n
b7:3 RESERVED \n
*/
rlUInt8_t loopBackCfg;
/**
* @brief Sub frame trigger
* 0 - Disabled
* 1 - Enabled (Need to trigger each sub-frame either by SW in \n
* software triggered mode or HW SYNC_IN line in hardware triggered mode)
*/
rlUInt8_t subFrameTrigger;
#else
/**
* @brief Force profile.
0x0 The profile index set in rlSetChirpConfig API governs which profile is \n
used when that chirp is transmitted \n
0x1 The profile index indicated in rlSetChirpConfig API is ignored and all \n
the chirps in each sub frame use a single profile as indicated by that sub \n
frame's profile forceProfileIdx. \n
*/
rlUInt8_t forceProfile;
/**
* @brief Number of sub frames enabled in this frame Valid range: 1 to 4
*/
rlUInt8_t numOfSubFrames;
/**
* @brief Sub frame trigger
* 0 - Disabled
* 1 - Enabled (Need to trigger each sub-frame either by SW in \n
* software triggered mode or HW SYNC_IN line in hardware triggered mode)
*/
rlUInt8_t subFrameTrigger;
/**
* @brief Bit Definition \n
b0 LOOPBACK_CFG_EN \n
0 - Disable \n
1 - Enable \n
b2:1 SUB_FRAME_ID for which the loopback configuration applies \n
b7:3 RESERVED \n
*/
rlUInt8_t loopBackCfg;
#endif
/**
* @brief Subframe config for 4 sub frames
*/
rlSubFrameCfg_t subFrameCfg[RL_MAX_SUBFRAMES];
/**
* @brief Number of frames to transmit (1 frame = all enabled sub frames). If set to 0, \n
frames are transmitted endlessly till Frame Stop message is received.\n
Valid range: 0 to 65535 \n
*/
rlUInt16_t numFrames;
/**
* @brief Selects the mode for triggering start of transmission of frame \n
0x0001 SWTRIGGER (Software API based triggering): \n
Frame is triggered upon receiving rlSensorStart There could be several tens \n
of micro seconds uncertainty in triggering. \n
Note:This mode is not applicable if this mmwave device is configured as \n
MULTICHIP_SLAVE in rlChanCfg_t \n
0x0002 HWTRIGGER (Hardware SYNC_IN based triggering): \n
Each frame is triggered by rising edge of pulse in SYNC_IN pin, after \n
receiving rlSensorStart (this is to \n prevent spurious transmission). \n
W.r.t. the SYNC_IN pulse, the actual transmission has 5ns uncertainty in \n
SINGLECHIP and only a 300 ps uncertainty (due to tight inter-chip \n
synchronization needed) in MULTICHIP sensor applications as defined in \n
rlChanCfg_t. \n
*/
rlUInt16_t triggerSelect;
/**
* @brief Optional time delay from sync_in trigger to the occurance of frame chirps \n
Applicable only in SINGLECHIP sensor applications, as defined in rlChanCfg_t.\n
It is recommended only for staggering the transmission of multiple mmwave \n
sensors around the car for interference avoidance, if needed. \n
1 lsb = 5 ns \n
Typical range is 0 to few tens of micro seconds. \n
*/
rlUInt32_t frameTrigDelay;
/**
* @brief Reserved for Future use
*/
rlUInt32_t reserved0;
/**
* @brief Reserved for Future use
*/
rlUInt32_t reserved1;
}rlAdvFrameSeqCfg_t;
rlAdvFrameDataCfg_t结构体如下：
typedef struct rlAdvFrameDataCfg
{
#ifndef MMWL_BIG_ENDIAN
/**
* @brief Number of Sub Frames, Valid Range (1 - 4)
*/
rlUInt8_t numSubFrames;
/**
* @brief Reserved for Future use
*/
rlUInt8_t reserved0;
#else
/**
* @brief Reserved for Future use
*/
rlUInt8_t reserved0;
/**
* @brief Number of Sub Frames, Valid Range (1 - 4)
*/
rlUInt8_t numSubFrames;
#endif
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved1;
/**
* @brief Sub Frame data configuration array.
*/
rlSubFrameDataCfg_t subframeDataCfg[RL_MAX_SUBFRAMES];
}rlAdvFrameDataCfg_t;
rlSubFrameCfg_t结构体如下：
typedef struct rlSubFrameCfg
{
/**
* @brief Force profile index. This is applicable only if FORCE_SINGLE_PROFILE is set to 1
*/
rlUInt16_t forceProfileIdx;
/**
* @brief Start Index of Chirp Valid range = 0-511
*/
rlUInt16_t chirpStartIdx;
/**
* @brief Num of unique Chirps per burst including start index Valid range = 1 - 512
*/
rlUInt16_t numOfChirps;
/**
* @brief No. of times to loop through the unique chirps in each burst, without gaps, \n
using HW.\n valid range = 1 to 255 \n
*/
rlUInt16_t numLoops;
/**
* @brief burstPeriodicity >= (numLoops)* (numOfChirps) + InterBurstBlankTime, \n
where InterBurstBlankTime is primarily for sensor calibration / monitoring, \n
thermal control, and some minimum time needed for triggering \n
next burst (~10us).\n
NOTE: Across bursts, if the value numOfChirps, is not a constant, then the \n
actual available blank time can vary and needs to be accounted for\n
1 LSB = 5 ns \n
*/
rlUInt32_t burstPeriodicity;
/**
* @brief Chirp Start address increament for next burst, \n
next_burst_chirp_start_idx = last_chirp_end_index + \n
h_ChirpStartIdxIncr 0 - 511, 0 = 2nd burst = 1st burst \n
*/
rlUInt16_t chirpStartIdxOffset;
/**
* @brief Num of bursts in the subframe. Valid Range: 1 - 512
*/
rlUInt16_t numOfBurst;
/**
* @brief Number of times to loop over the set of above defined bursts, in the sub frame.\n
Valid Range: 1 - 64 \n
*/
rlUInt16_t numOfBurstLoops;
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved0;
/**
* @brief subFramePeriodicity >= Sum total time of all bursts + InterSubFrameBlankTime, \n
Where, Sum total time of all bursts = numOfBurstLoops * numOfBurst * \n
burstPeriodicity. \n
InterSubFrameBlankTime is primarily for sensor calibration / monitoring, \n
thermal control, transferring out any safety monitoring data if requested, \n
hardware reconfiguration for next sub frame, retriggering of next SF (~10us).\n
The hardware reconfiguration time, which is needed to transfer out the SF's \n
InterSubFrameBlankTime >= 100 us. \n
With loopback enabled InterSubFrameBlankTime >= 350 us. \n
Add 150 us to InterSubFrameBlankTime for test source confguration if test \n
source is enabled. \n
1 LSB = 5 ns \n
Valid range 100 us to 1.342 s. \n
*/
rlUInt32_t subFramePeriodicity;
/**
* @brief Reserved for Future use
*/
rlUInt32_t reserved1;
/**
* @brief Reserved for Future use
*/
rlUInt32_t reserved2;
}rlSubFrameCfg_t;
rlSubFrameDataCfg_t结构体：
typedef struct rlSubFrameDataCfg
{
/**
* @brief Number of Chirps in Sub-Frame = numOfChirps * numLoops * numOfBurst * burstLoop
*/
rlUInt32_t totalChirps;
/**
* @brief Number of half words of ADC samples per data packet in sub frame 1 \n
Example 1: In real mode, if number of ADC samples per chirp in subframe1 is
256 then this value will be 256 \n
Example 2: In complex1x or complex2x modes, if number of ADC samples per
chirp in subframe1 is 256 then this value will be 512 \n
In AWR1243: Program this as number of ADC samples in each chirp of
this sub frame (required to be the same)\n
Exception: Can do number of chirps based ping-pong as in xWR1642
(see below), if CP/CQ are not needed. Useful for chirp stitching use case.\n
In xWR1642: The ADC samples corresponding to one or more chirps can be
grouped and sent to the DSP as a single packet. Program this as the number
of half words of ADC samples per packet. Ensure that in one sub frame, there
is integer number of such packets. \n
Maximum size of a data packet: (16384 - 1) half words
*/
rlUInt16_t numAdcSamples;
#ifndef MMWL_BIG_ENDIAN
/**
* @brief Number of Chirps Per Data Packet to process at a time in sub frame 1. \n
In AWR1243/xWR1443: Program this as 1. \n
Exception: Can be > 1 as in 16xx if CP/CQ is not needed. Useful for chirp
stitching use case.\n
In xWR1642/xWR1843: The ADC samples corresponding to one or more chirps can be
grouped and sent to the DSP as a single packet. Program this as the
corresponding number of chirps per packet. \n
Maximum value = 8. \n
Note on maximum size: 8 chirps for CP and BPM.
*/
rlUInt8_t numChirpsInDataPacket;
/**
* @brief Reserved for Future use
*/
rlUInt8_t reserved;
#else
/**
* @brief Reserved for Future use
*/
rlUInt8_t reserved;
/**
* @brief Number of Chirps Per Data Packet to process at a time in sub frame 1. \n
In AWR1243/xWR1443: Program this as 1. \n
Exception: Can be > 1 as in 16xx if CP/CQ is not needed. Useful for chirp
stitching use case.\n
In xWR1642/xWR1843: The ADC samples corresponding to one or more chirps can be
grouped and sent to the DSP as a single packet. Program this as the
corresponding number of chirps per packet. \n
Maximum value = 8. \n
Note on maximum size: 8 chirps for CP and BPM. \n
*/
rlUInt8_t numChirpsInDataPacket;
#endif
}rlSubFrameDataCfg_t;
函数返回值：
函数执行成功后返回值为0，函数执行失败后返回值为错误代码
注意：
- 如果是硬件触发模式且subFrameTrigger = 0，则应为每个burst提供触发器。如果subFrameTrigger = 1，则需要为每个sub-frame提供触发器
- 如果使用硬件触发模式，同步脉冲宽度应小于1us。同时，同步的最小脉冲宽度应为25ns。
- 如果帧触发延迟与硬件模式一起使用，则外部的同步脉冲周期应该考虑配置的帧触发延迟和帧周期。外部的脉冲必须在帧触发延迟和帧周期之和后发出。
- 在Hw触发模式下，应发出Hw脉冲或配置脉冲周期，使脉冲在previous frame/burst完成后仅150us产生(在previous frame/burst结束前不应发出脉冲)。previous frame/burst结束与Hw脉冲上升沿之间的时间差建议<300us。
- 当一个sub-frame使用多个profiles时，sub-frame中的chirp的PF_NUM_ADC_SAMPLES 应该相同。
- PF_DIGITAL_OUTPUT_SAMPLING_RATE 影响子帧中的LVDS/CSI2数据速率，因此建议分析sub-frame中的chirp使用不同采样率时的定时影响。
- 有关最低帧间空白时间要求的详细信息，参阅：链接
- DFP 1.x(第一代设备)不支持此API中的环回配置。
FrameConfig
函数原型：
rlReturnVal_t rlSetFrameConfig(
rlUInt8_t deviceMap,
rlFrameCfg_t * data
)
函数功能：
此函数允许在毫米波前端配置FMCW帧。一帧基本上是一系列的chirp，以及这种序列如何随着时间的推移而重复。用户首先需要定义一个profile和一组chirp(与一个profile相关联)。然后，这个函数定义如何对这些chirps进行排序。同一个chirp可以简单的循环以创建一个大的FMCW帧，或者可以对多个独特的chirp进行排序来创建帧，Chirp Start和end Index定义了如何在一个帧中对它们进行排序。该API还允许配置要传输的帧数，帧的周期性和触发器方法。触发方法可以是基于SW-API的触发器或基于HW-SYNC-IN的触发器。这个API内部调用两个API，一个调用RadarSS进行传感器配置，另一个调用MasterSS进行数据路径配置
函数参数：
第一个参数deviceMap是输入参数，意思是：Bitmap of devices to send the message，取值可以有：
RL_DEVICE_MAP_INTERNAL_BSS
RL_DEVICE_MAP_INTERNAL_DSS_MSS
RL_DEVICE_MAP_INTERNAL_HOST
第二个参数data是输入参数，意思是：帧配置数据的容器，它是一个rlFrameCfg_t结构体，如下：
typedef struct rlFrameCfg
{
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved0;
/**
* @brief Start Index of Chirp Valid range = 0-511
*/
rlUInt16_t chirpStartIdx;
/**
* @brief End Index of Chirp Valid range = chirpStartIdx-511
*/
rlUInt16_t chirpEndIdx;
/**
* @brief Number of times to repeat from chirpStartIdx to chirpStartIdx in each frame, \n
valid range = 1 to 255 \n
*/
rlUInt16_t numLoops;
/**
* @brief Number of frame to transmit \n
Valid Range 0 to 65535 (0 for infinite frames) \n
*/
rlUInt16_t numFrames;
/**
* @brief Number of ADC samples to capture This parameter is required only for AWR1243 and \n
configures the size of ADC samples per chirp to be sent on LVDS/CSI2 \n
interface.\n
It should be configured as:
For real/pseudo real ADC data - numADCSamples = rlProfileCfg_t.numAdcSamples \n
For complex1x/complex2x ADC data - \n
numADCSamples = (rlProfileCfg_t.numAdcSamples ) * 2 \n
*/
rlUInt16_t numAdcSamples;
/**
* @brief Frame repitition period \n
1 LSB = 5 ns\n
Typical range 1 ms to 1000 ms \n
*/
rlUInt32_t framePeriodicity;
/**
* @brief Selects the mode for triggering start of transmission of frame \n
0x0001 SWTRIGGER (Software API based triggering): \n
Frame is triggered upon receiving rlSensorStart\n
There could be several tens of micro seconds uncertainty in triggering. \n
Note: This mode is not applicable if this mmwave device is configured as \n
MULTICHIP_SLAVE in rlChanCfg_t \n
0x0002 HWTRIGGER (Hardware SYNC_IN based triggering): \n
Each frame is triggered by rising edge of pulse in SYNC_IN pin, after
receiving rlSensorStart (this is to prevent spurious transmission).
W.r.t. the SYNC_IN pulse, the actual transmission has 5ns uncertainty in \n
SINGLECHIP and only a 300 ps uncertainty (due to tight inter-chip
synchronization needed) in MULTICHIP sensor applications as defined in
rlChanCfg_t. \n
*/
rlUInt16_t triggerSelect;
/**
* @brief Reserved for Future use
*/
rlUInt16_t reserved1;
/**
* @brief Optional time delay from sync_in trigger to the occurance of frame chirps \n
Applicable only in SINGLECHIP sensor applications, as defined in rlChanCfg_t.\n
It is recommended only for staggering the transmission of multiple mmwave \n
sensors around the car for interference avoidance, if needed.\n
1 lsb = 5 ns \n
Typical range is 0 to few tens of micro seconds. \n
*/
rlUInt32_t frameTriggerDelay;
}rlFrameCfg_t;
函数返回值：
函数执行成功后返回值为0，函数执行失败后返回值为错误代码
四者(profile、chirp、advframe、frame)总结
profile是chirp的模板，profile只是对chirp进行粗略的配置，而对chirp进行配置的时候，可以通过指定profileId来确定要指定哪一个profile，advframe和frame的区别在于frame只能由chirp构成，而advframe由subframe组成，而subframe由burst组成，burst由chirp组成，下图两幅图说明advframe
参考文献：
- 《mmWave SDK Module Documentation》
- Programming Chirp Parameters in TI Radar Devices(TI雷达设备中的Chirp参数编程)